PYNQ-Z1 Python Productivity for Zynq

•Web server hosting the Jupyter Notebooks design environment

•The IPython kernel and packages

•Linux

•Base hardware library and API for the FPGA 

· Computer vision

· Industrial control

· The Internet of things (IoT)

· Drones

· Encryption

· Embedded computing acceleration

· ZYNQ XC7Z020-1CLG400C:

• 650MHz dual-core Cortex-A9 processor
• DDR3 memory controller with 8 DMA channels and 4 high performance AXI3 slave ports
• High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
• Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
• Programmable from JTAG, Quad-SPI flash, and microSD card
• Artix-7 family programmable logic
•    13,300 logic slices, each with four 6-input LUTs and 8 flip-flops
•    630 KB of fast blockRAM
•    4 clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
•    220 DSP slices
•    On-chip analog-to-digital converter (XADC)

· Memory:

•  512MB DDR3 with 16-bit bus @ 1050Mbps
•  16MB Quad-SPI Flash with factory programmed globally unique identifier (48-bit EUI-48/64™ compatible).
•  MicroSD slot

· Power:

•  Powered from USB or any 7V-15V source (see recommended products)

· USB and Ethernet:

•  USB-JTAG Programming circuitry
•  USB-UART bridge
•  USB OTG PHY (supports host only)
•  Gigabit Ethernet PHY

· Audio and Video:

•  Electret microphone with pulse density modulated (PDM) output
•  3.5mm mono audio output jack, pulse-width modulated (PWM) format
•  HDMI sink port (input)
•  HDMI source port (output)

· Switches, push-buttons, and LEDs:

•  4 push-buttons
•  2 slide switches
•  4 LEDs
•  2 RGB LEDs

· Expansion Connectors:

•  Two standard Pmod ports
• 16 Total FPGA I/O
•  Arduino/chipKIT Shield connector
• 49 Total FPGA I/O
• 6 Single-ended 0-3.3V Analog inputs to XADC
• 4 Differential 0-1.0V Analog inputs to XADC